I am a Computer Engineering student at Dr. D. Y. Patil Institute of Technology (Pune), focusing on the intersection of Systems Programming (C++) and Artificial Intelligence.
My interest lies in the infrastructure layer — optimizing how AI models are deployed, reducing latency in distributed pipelines, and building systems that work at the edge without cloud dependency.
- Core Focus: High-Performance Computing, Distributed Systems, Edge AI, DSP
- Research: Recipient of the La Trobe University Research Grant for architecting neuro-hybrid monitoring systems
- Current State: Porting Python logic to C++17 to minimize runtime overhead and building toward CUDA/GPU engineering
| Systems & Core |
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| DSP & Audio |
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| AI & Inference |
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| Infrastructure |
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| Hardware |
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Offline, physics-first vibration intelligence system for SME industrial machinery · AMD Slingshot 2026
- Architected a C++ DSP ingestion engine using PortAudio and FFTW3 — high-pass (100Hz) + low-pass (12kHz) filters isolate mechanical frequency bands before inference, with 2048-point FFT and 75% overlap generating 1024×64 log-magnitude spectrograms at 44.1kHz
- Engineered a deterministic RMS safety gate in C++ firing in under 1ms — bypasses AI inference entirely for critical threshold breaches, ISO 10816-3:2009 compliant
- Trained a Convolutional Autoencoder on healthy baseline data and deployed via ONNX Runtime targeting AMD Ryzen AI XDNA NPU via Vitis AI Runtime — 3ms median inference on CPU, sub-5ms projected on 50 TOPS NPU
- Designed a three-tier ZeroMQ PUB/SUB distributed pipeline — C++ DSP node → Python inference node → React dashboard — validated at 30.9ms mean end-to-end pipeline latency, 10/10 frames verified
- Integrated Llama 3.1 8B via Ollama for local multilingual fault alerts in Hindi, Marathi, and English — fully offline, graceful fallback confirmed
- 85% cheaper than existing solutions — ₹3,499/sensor node targeting 500,000+ unserved Indian SME factories
C++17 FFTW3 PortAudio ZeroMQ ONNX PyTorch Vitis AI Llama 3.1 React Docker Raspberry Pi
Distributed neuro-hybrid monitoring system · La Trobe University Research Grant
- Architected a producer-consumer model where a C++ core captures biometrics, encrypts payloads via AES-256, and streams to a Python analyzer with <50ms latency via IPC sockets
- Designed secure inter-process communication using ZeroMQ with OpenSSL encryption layer — no plaintext biometric data ever transmitted
- Funded by La Trobe University Research Grant for work on neuro-hybrid cognitive monitoring architecture
C++ ZeroMQ OpenSSL AES-256 Python FastAPI
High-performance audio recognition kernel — foundation for Resonance DSP pipeline
- Implementing the Avery Wang fingerprinting algorithm using FFT spectrograms and combinatorial hash matching in C++17
- Profiling CPU bottlenecks and experimenting with SIMD (AVX2) optimizations for spectral peak finding
- Core DSP concepts from this project directly informed the Resonance signal pipeline
C++17 FFTW3 Librosa DSP Audio Fingerprinting
- Built a custom scraping pipeline to parse exam papers and used semantic clustering (Sentence-Transformers) to group recurring concepts across PDF documents
- End-to-end study planner with Rasa NLP backend
Rasa NLP Sentence-Transformers Web Scraping
- AMD Slingshot 2026 — Built and submitted Resonance, a working Edge AI fault detection prototype on AMD Ryzen AI hardware
- La Trobe University Research Grant — Awarded for the NeuroBloom neuro-hybrid monitoring system
- Smart India Hackathon (SIH) — 2× Internal Finalist (2024, 2025)
- Education — B.E. Computer Engineering, Dr. D.Y. Patil Institute of Technology · CGPA 8.75/10
